[PATCH] D95800: [RISCV] Make scalable vector FMA commutable for register allocation.

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck added a comment.

There seem to be a lot of linter errors which might make working on this code difficult. At the least it makes the diff harder to read. I know the macro cases confuse clang-tidy but is there something we can do?



================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.cpp:945
+    // For these instructions we have more freedom. We can commute with the
+    // other multiplicand or with the addend/subtrahend/minued.
+
----------------
`minued` -> `minuend`.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:1778
+    // Add a commutable version for use by IR fma.
+    // FIXME: If we didn't have the tail undisturbed policy on the intrinsic
+    // version, we wouldn't need this.
----------------
Is this a FIXME, as in, are we likely to change the policy on the intrinsics?

Also I'm still a bit unclear on what the tail policy has to do with commuting operands. What am I missing?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D95800/new/

https://reviews.llvm.org/D95800