[PATCH] D95779: [X86][AVX512] Support variable-index vector insertion on AVX512 targets

[Sanjay Patel via Phabricator via llvm-commits]

spatel accepted this revision.
spatel added a comment.
This revision is now accepted and ready to land.

LGTM - see inline for a couple of minors.



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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:18829-18832
+    SDValue IdxSplat = DAG.getBuildVector(
+        IdxVT, dl, SmallVector<SDValue, 16>(NumElts, IdxExt));
+    SDValue EltSplat =
+        DAG.getBuildVector(VT, dl, SmallVector<SDValue, 16>(NumElts, N1));
----------------
Could use DAG.getSplatBuildVector() for both of these for slightly less code.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:18839
+
+    return DAG.getSelectCC(dl, IdxSplat, Indices, EltSplat, N0,
+                           ISD::CondCode::SETEQ);
----------------
We should have a code comment to describe the pattern:
// inselt N0, N1, N2 --> select (SplatN2 == {0,1,2...}) ? SplatN1 : N0 


Repository:
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  https://reviews.llvm.org/D95779/new/

https://reviews.llvm.org/D95779