[PATCH] D95632: [AArch64] Specify Tail Duplication Size Override

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 1 00:42:19 PST 2021

Previous message: [PATCH] D95611: [ADT][NFC] Add extra typedefs to `ArrayRef` and `MutableArrayRef`
Next message: [PATCH] D95632: [AArch64] Specify Tail Duplication Size Override
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

dmgreen added a comment.

This sounds OK to me, but 6 is quite a big jump up from 2. Is is possible to make the normal threshold 2 or 3, and the aggressive threshold 6?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D95632/new/

https://reviews.llvm.org/D95632

Previous message: [PATCH] D95611: [ADT][NFC] Add extra typedefs to `ArrayRef` and `MutableArrayRef`
Next message: [PATCH] D95632: [AArch64] Specify Tail Duplication Size Override
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list