[llvm] 177b8d1 - [VE] Fix compiler warnings (NFC)

Kazu Hirata via llvm-commits llvm-commits at lists.llvm.org
Sun Jan 31 10:24:10 PST 2021


Author: Kazu Hirata
Date: 2021-01-31T10:23:39-08:00
New Revision: 177b8d1ad3cd78aa789bb246c42cbf10dda8a901

URL: https://github.com/llvm/llvm-project/commit/177b8d1ad3cd78aa789bb246c42cbf10dda8a901
DIFF: https://github.com/llvm/llvm-project/commit/177b8d1ad3cd78aa789bb246c42cbf10dda8a901.diff

LOG: [VE] Fix compiler warnings (NFC)

Added: 
    

Modified: 
    llvm/lib/Target/VE/VEISelLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/VE/VEISelLowering.cpp b/llvm/lib/Target/VE/VEISelLowering.cpp
index d377f8e27cfd..f1ed22069bd0 100644
--- a/llvm/lib/Target/VE/VEISelLowering.cpp
+++ b/llvm/lib/Target/VE/VEISelLowering.cpp
@@ -2743,6 +2743,7 @@ SDValue VETargetLowering::lowerEXTRACT_VECTOR_ELT(SDValue Op,
 
   // Special treatment for packed V64 types.
   assert(VT == MVT::v512i32 || VT == MVT::v512f32);
+  (void)VT;
   // Example of codes:
   //   %packed_v = extractelt %vr, %idx / 2
   //   %v = %packed_v >> (%idx % 2 * 32)
@@ -2787,6 +2788,7 @@ SDValue VETargetLowering::lowerINSERT_VECTOR_ELT(SDValue Op,
 
   // Special treatment for packed V64 types.
   assert(VT == MVT::v512i32 || VT == MVT::v512f32);
+  (void)VT;
   // The v512i32 and v512f32 starts from upper bits (0..31).  This "upper
   // bits" required `val << 32` from C implementation's point of view.
   //


        


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