[PATCH] D44092: [SystemZ] Improve side steering of FPd unit and FXU registers.

[Jonas Paulsson via Phabricator via llvm-commits]

jonpa updated this revision to Diff 320228.
jonpa added a comment.

Patch updated with latest improvements (still experimental).

I tried refining the look-ahead techniques as I were looking into single cases that could be improved relative to the heuristic approach, which however typically seemed to fix a particular issue while making overall results worse:

- check against the number of other available instructions in order to let "next" side begin on the "current" side when it had to (as well as letting the current side be evaluated into the next side if it did not fit in current).
- handlings so that the "other pred" which is also available as a separate candidate did not get scheduled if the algorithm had decided that the optimal sequence was SU, "other pred", SU.

The lookahead algorithm could handle tricky overlapping cases with cost functions, but it got too complicated with the 3-instruction case ("other-pred"). This is rather simple to use as a heuristic: "If SU has a B2B user that is also waiting for another predecessor, schedule all three of them if on first decoder slot. But making that work in a more comprehensive context was not at all as simple...

This version shows the lookahead algorithm that gave the best numbers (see below), which was without the two points above. Overall, it was just slightly better than the heuristic approach. The first section below lists the number of instructions that had a particular number of Good/Bad B2BR operands as they were scheduled. For example, 138k instructions with a single B2BR operand where now scheduled on the right side. There were fewer instructions with both operands on the bad side - some of them got both on the right side, some became 1/1.

  master <> heuristical approach
  Good: 0  Bad 1   264532   125894  -138638
  Good: 0  Bad 2    12455     6691    -5764
  Good: 1  Bad 0   506788   645426   138638
  Good: 1  Bad 1     9410    11460     2050
  Good: 1  Bad 2       71      101       30
  Good: 2  Bad 0     7617    11331     3714
  Good: 2  Bad 1       52       51       -1
  
  Sum edges LHS: Good:  531626 Bad:  299163
  Sum edges RHS: Good:  679755 Bad:  151034
                       +148129      -148129



  heuristical <> look-ahead
  Good: 0  Bad 1   125894   121273    -4621
  Good: 0  Bad 2     6691     7295      604
  Good: 1  Bad 0   645426   650047     4621
  Good: 1  Bad 1    11460     9803    -1657
  Good: 1  Bad 2      101      104        3
  Good: 2  Bad 0    11331    12384     1053
  Good: 2  Bad 1       51       50       -1
  Good: 2  Bad 2        0        1        1
  
  Sum edges LHS: Good:  679755 Bad:  151034
  Sum edges RHS: Good:  684827 Bad:  145962
  		       +5072        -5072

The look-ahead took a few more instructions to the right side.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D44092/new/

https://reviews.llvm.org/D44092

Files:
  llvm/lib/Target/SystemZ/SystemZHazardRecognizer.cpp
  llvm/lib/Target/SystemZ/SystemZHazardRecognizer.h
  llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp
  llvm/lib/Target/SystemZ/SystemZMachineScheduler.h
  llvm/lib/Target/SystemZ/SystemZSchedule.td
  llvm/lib/Target/SystemZ/SystemZScheduleZ14.td
  llvm/lib/Target/SystemZ/SystemZScheduleZ15.td
  llvm/test/CodeGen/SystemZ/postra-sched-sidesteer.mir

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D44092.320228.patch
Type: text/x-patch
Size: 102582 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210129/504e1165/attachment-0001.bin>