[PATCH] D95699: [GlobalISel] Disable vector types in narrowScalarAddSub

[Cassie Jones via Phabricator via llvm-commits]

porglezomp created this revision.
porglezomp added reviewers: arsenm, paquette, aemerson.
Herald added subscribers: hiraditya, rovka.
porglezomp requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.

The implementation for vectors is broken and doesn't seem to be used by
anything. Explicitly remove support for them, they can be added again
later when they're properly implemented.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D95699

Files:
  llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp


Index: llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
===================================================================
--- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -4447,6 +4447,10 @@
   if (TypeIdx != 0)
     return UnableToLegalize;
 
+  // FIXME: add support for vector types
+  if (MRI.getType(MI.getOperand(0).getReg()).isVector())
+    return UnableToLegalize;
+
   uint64_t SizeOp0 = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits();
   uint64_t NarrowSize = NarrowTy.getSizeInBits();
 
@@ -4493,10 +4497,7 @@
     CarryIn = CarryOut;
   }
   Register DstReg = MI.getOperand(0).getReg();
-  if (MRI.getType(DstReg).isVector())
-    MIRBuilder.buildBuildVector(DstReg, DstRegs);
-  else
-    MIRBuilder.buildMerge(DstReg, DstRegs);
+  MIRBuilder.buildMerge(DstReg, DstRegs);
   MI.eraseFromParent();
   return Legalized;
 }


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