[PATCH] D95645: [AArch64][GlobalISel] Add a combine to fold away truncate in: G_ICMP EQ/NE (G_TRUNC(v), 0)

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


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Comment at: llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp:73
+  LLT LHSTy = MRI.getType(LHS);
+  if (!LHSTy.isScalar())
+    return false;
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Is there any reason why this doesn't Just Work for vector types too?


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Comment at: llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp:80
+  if (!mi_match(LHS, MRI, m_GTrunc(m_Reg(WideReg))) ||
+      !mi_match(RHS, MRI, m_SpecificICst(0)))
+    return false;
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There's also m_ZeroInt for this.


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Comment at: llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp:84
+  LLT WideTy = MRI.getType(WideReg);
+  if (KB->computeNumSignBits(WideReg) <=
+      WideTy.getSizeInBits() - LHSTy.getSizeInBits())
----------------
Could also do the optimisation if all the extended bits are known to be zero?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D95645/new/

https://reviews.llvm.org/D95645