[PATCH] D95659: [RISCV] Initial support of LoopVectorizer for RISC-V Vector.

[Hsiangkai Wang via Phabricator via llvm-commits]

HsiangKai created this revision.
HsiangKai added reviewers: craig.topper, evandro, rogfer01, frasercrmck, khchen.
Herald added subscribers: NickHung, luismarques, apazos, sameer.abuasal, pzheng, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, hiraditya.
HsiangKai requested review of this revision.
Herald added a subscriber: MaskRay.
Herald added a project: LLVM.

Define an option -riscv-vector-bits-max to specify the maximum vector
bits for vectorizer. Loop vectorizer will use the value to check if it
is safe to use the whole vector registers to vectorize the loop.

It is not the optimum solution for loop vectorizing for scalable vector.
It assumed the whole vector registers will be used to vectorize the code.
If it is possible, we should configure vl to do vectorize instead of
using whole vector registers.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D95659

Files:
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
  llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
  llvm/test/Transforms/LoopVectorize/RISCV/scalable-vf-hint.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D95659.320027.patch
Type: text/x-patch
Size: 6932 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210129/d9997286/attachment.bin>