[PATCH] D95588: [RISCV] Implement the MC layer support of P extension
Jim Lin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 28 17:43:14 PST 2021
Jim added a comment.
In D95588#2527882 <https://reviews.llvm.org/D95588#2527882>, @asb wrote:
> Hi Jim, thanks for the contribution. I saw you were on the review thread for D94579 <https://reviews.llvm.org/D94579> which also aims to implement MC layer support for the P extension - could you please comment on the difference between these two patches as you see it?
Hi,
I listed extra works in this implementation
1. Register class (GPRP) have vector types for 'P' instruction.
2. GPRPair is a special register class with even/odd pair of registers for RV32.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D95588/new/
https://reviews.llvm.org/D95588
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