[PATCH] D95489: [AMDGPU] Do not reassign spilled registers

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 27 15:15:42 PST 2021


arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp:474
 
+  // InlineSpiller does not call LRM::assign() after an LI split leaving it
+  // in an incosistent state, so we cannot call LRM::unassign(). Skip reassign
----------------
rampitec wrote:
> arsenm wrote:
> > I don't understand if this is a bug with LRM::assign or not
> Not in the LRM. This is probably a bug, but in the implementation of the InlineSpiller which uses VRM directly and dies not call LRM::assign(). Nobody has hit it before because nobody tried to use unassign() after greedy I suppose. However, this is not really easy to fix it in the spiller.
Can you add a fixme explaining this and file a bug for this


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D95489/new/

https://reviews.llvm.org/D95489



More information about the llvm-commits mailing list