[PATCH] D95136: [X86] Fix tile config register spill issue.
Xiang Zhang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 28 03:41:56 PST 2021
xiangzhangllvm added inline comments.
================
Comment at: llvm/lib/Target/X86/X86PreTileConfig.cpp:229
+
+struct ReloadTileConfig {
+ enum SuccStatus { NoAMXAtAll = 0, HasAfterCallAMX, HasBeforeCallAMX };
----------------
LGTM for the logic.
================
Comment at: llvm/lib/Target/X86/X86PreTileConfig.cpp:235
+ bool NeedUpdatePred = true;
+ bool HasCallBeforeAMX = false;
+ SuccStatus MaxSucc = NoAMXAtAll;
----------------
Can use a better name for HasCallBeforeAMX? it is very easy to mix with HasAfterCallAMX when I read here
================
Comment at: llvm/lib/Target/X86/X86PreTileConfig.cpp:283
+ // But iterating all BBs isn't too expensive here.
+ for (auto I : BBVisitedInfo) {
+ if (I.second.NeedUpdatePred)
----------------
The logic here is complex, better to add clear comment to show how we update the Status for BBs.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D95136/new/
https://reviews.llvm.org/D95136
More information about the llvm-commits
mailing list