[PATCH] D94974: [SLP] Try doubled MaxElts for stores vectorization

[Anton Afanasyev via Phabricator via llvm-commits]

anton-afanasyev marked an inline comment as done.
anton-afanasyev added inline comments.


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Comment at: llvm/test/Transforms/SLPVectorizer/X86/arith-add-ssat.ll:174
 ; AVX256BW-NEXT:    store <4 x i64> [[TMP6]], <4 x i64>* bitcast (i64* getelementptr inbounds ([8 x i64], [8 x i64]* @c64, i32 0, i64 4) to <4 x i64>*), align 8
 ; AVX256BW-NEXT:    ret void
   %a0 = load i64, i64* getelementptr inbounds ([8 x i64], [8 x i64]* @a64, i32 0, i64 0), align 8
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RKSimon wrote:
> anton-afanasyev wrote:
> > RKSimon wrote:
> > > please can you cleanup all these checks ?
> > Fixed this line in test or did you mean to precommit check prefixes?
> We seem to have AVX and AVX1 check prefixes now - go back and replace the check-prefixes=AVX with check-prefixes=AVX1 (not sure if we can have a common AVX for AVX1 + AVX2)?
Oh, I see. Done.
(no, we can't use common AVX for AVX1 + AVX2 in that case).


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  https://reviews.llvm.org/D94974/new/

https://reviews.llvm.org/D94974