[PATCH] D94974: [SLP] Try doubled MaxElts for stores vectorization

Wed Jan 27 10:12:29 PST 2021

RKSimon added inline comments.

================
Comment at: llvm/test/Transforms/SLPVectorizer/X86/arith-add-ssat.ll:174
 ; AVX256BW-NEXT:    store <4 x i64> [[TMP6]], <4 x i64>* bitcast (i64* getelementptr inbounds ([8 x i64], [8 x i64]* @c64, i32 0, i64 4) to <4 x i64>*), align 8
 ; AVX256BW-NEXT:    ret void
   %a0 = load i64, i64* getelementptr inbounds ([8 x i64], [8 x i64]* @a64, i32 0, i64 0), align 8
----------------
anton-afanasyev wrote:
> RKSimon wrote:
> > please can you cleanup all these checks ?
> Fixed this line in test or did you mean to precommit check prefixes?
We seem to have AVX and AVX1 check prefixes now - go back and replace the check-prefixes=AVX with check-prefixes=AVX1 (not sure if we can have a common AVX for AVX1 + AVX2)?

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94974/new/

https://reviews.llvm.org/D94974