[PATCH] D94949: [AArch64][RegAllocFast] Add findSpillBefore to TargetRegisterInfo

Mircea Trofin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 27 08:40:16 PST 2021


mtrofin added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp:791
+AArch64RegisterInfo::findSpillBefore(MachineInstr &MI) const {
+  auto IsExclusiveLoad = [](auto &MI) -> Optional<unsigned> {
+    switch (MI.getOpcode()) {
----------------
Nit: "Is" prefix suggests returning a boolean. How about GetExclusiveLoadOpcode?




================
Comment at: llvm/lib/Target/ARM/ARMRegisterInfo.cpp:25
+MachineBasicBlock::iterator
+ARMRegisterInfo::findSpillBefore(MachineInstr &MI) const {
+  auto IsExclusiveLoad = [](const MachineInstr &MI) -> Optional<unsigned> {
----------------
how similar are the 2 implementations - the one in AArch64RegisterInfo and here? Can there be some factoring to improve maintainability?


================
Comment at: llvm/lib/Target/ARM/ARMRegisterInfo.cpp:26
+ARMRegisterInfo::findSpillBefore(MachineInstr &MI) const {
+  auto IsExclusiveLoad = [](const MachineInstr &MI) -> Optional<unsigned> {
+    switch (MI.getOpcode()) {
----------------
same comment about name as in AArch64RegisterInfo.cpp


Repository:
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  https://reviews.llvm.org/D94949/new/

https://reviews.llvm.org/D94949



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