[PATCH] D95379: [ARM] [ELF] Fix ARMMaterializeGV for Indirect calls

[Adhemerval Zanella via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGdad55c22182e: [ARM] [ELF] Fix ARMMaterializeGV for Indirect calls (authored by zatrazz).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D95379/new/

https://reviews.llvm.org/D95379

Files:
  llvm/lib/Target/ARM/ARMFastISel.cpp
  llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll


Index: llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll
===================================================================
--- llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll
+++ llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll
@@ -61,8 +61,8 @@
 
 ; ARM-ELF: movw [[REG1:r[0-9]+]], :lower16:temp
 ; ARM-ELF: movt [[REG1]], :upper16:temp
-; ARM-ELF:      add [[REG1]], r1, #4
-; ARM-ELF-NEXT: add r1, r1, #16
+; ARM-ELF:      add r0, [[REG1]], #4
+; ARM-ELF-NEXT: add r1, [[REG1]], #16
 
 ; ARM: movw r2, #17
 ; ARM: bl {{_?}}memcpy
@@ -106,7 +106,7 @@
 
 ; ARM-ELF: movw [[REG0:r[0-9]+]], :lower16:temp
 ; ARM-ELF: movt [[REG0]], :upper16:temp
-; ARM-ELF:      add [[REG0]], r1, #4
+; ARM-ELF:      add r0, [[REG0]], #4
 ; ARM-ELF-NEXT: add r1, r1, #16
 
 ; ARM: movw r2, #10
Index: llvm/lib/Target/ARM/ARMFastISel.cpp
===================================================================
--- llvm/lib/Target/ARM/ARMFastISel.cpp
+++ llvm/lib/Target/ARM/ARMFastISel.cpp
@@ -606,7 +606,9 @@
     }
   }
 
-  if (IsIndirect) {
+  if ((Subtarget->isTargetELF() && Subtarget->isGVInGOT(GV)) ||
+      (Subtarget->isTargetMachO() && IsIndirect) ||
+      Subtarget->genLongCalls()) {
     MachineInstrBuilder MIB;
     unsigned NewDestReg = createResultReg(TLI.getRegClassFor(VT));
     if (isThumb2)


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