[PATCH] D95433: [ARM] Mark MVE_VMOV_to_lane_32 as isInsertSubregLike
Sjoerd Meijer via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 26 09:49:34 PST 2021
SjoerdMeijer added inline comments.
================
Comment at: llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp:5407
InsertedReg.SubReg = MOInsertedReg.getSubReg();
- InsertedReg.SubIdx = MOIndex.getImm() == 0 ? ARM::ssub_0 : ARM::ssub_1;
+ InsertedReg.SubIdx = ARM::ssub_0 + MOIndex.getImm();
return true;
----------------
dmgreen wrote:
> SjoerdMeijer wrote:
> > Hm, why this change? Is this a simplification? Don't think I understand this change.
> Thanks for taking a look.
>
> VSETLNi32 handles D regs, so ssub_0 or ssub_1. Because MVE_VMOV_to_lane_32 is working on Q regs it can be ssub_2 or ssub_3 as well. There are other places in llvm that assume that ssub_0 + x == ssub_x, so that seems safe to use.
Ah, okay, thanks, that's all clear now.
LGTM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D95433/new/
https://reviews.llvm.org/D95433
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