[PATCH] D95427: [ARM] Add neon FP16 scalar_to_vector patterns.
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 26 01:21:16 PST 2021
dmgreen created this revision.
dmgreen added reviewers: SjoerdMeijer, miyuki, NickGuy, simon_tatham, ostannard, efriedma.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls.
dmgreen requested review of this revision.
Herald added a project: LLVM.
This adds some simple fp16 scalar_to_vector patterns, preventing a selection failure if this came up.
https://reviews.llvm.org/D95427
Files:
llvm/lib/Target/ARM/ARMInstrNEON.td
llvm/test/CodeGen/ARM/fp16-insert-extract.ll
Index: llvm/test/CodeGen/ARM/fp16-insert-extract.ll
===================================================================
--- llvm/test/CodeGen/ARM/fp16-insert-extract.ll
+++ llvm/test/CodeGen/ARM/fp16-insert-extract.ll
@@ -74,6 +74,39 @@
ret float %conv
}
+define <4 x half> @insert_v4f16(half %a) {
+; CHECKHARD-LABEL: insert_v4f16:
+; CHECKHARD: @ %bb.0: @ %entry
+; CHECKHARD-NEXT: @ kill: def $s0 killed $s0 def $d0
+; CHECKHARD-NEXT: bx lr
+;
+; CHECKSOFT-LABEL: insert_v4f16:
+; CHECKSOFT: @ %bb.0: @ %entry
+; CHECKSOFT-NEXT: vmov.f16 s0, r0
+; CHECKSOFT-NEXT: vmov r0, r1, d0
+; CHECKSOFT-NEXT: bx lr
+entry:
+ %res = insertelement <4 x half> undef, half %a, i32 0
+ ret <4 x half> %res
+}
+
+define <8 x half> @insert_v8f16(half %a) {
+; CHECKHARD-LABEL: insert_v8f16:
+; CHECKHARD: @ %bb.0: @ %entry
+; CHECKHARD-NEXT: @ kill: def $s0 killed $s0 def $q0
+; CHECKHARD-NEXT: bx lr
+;
+; CHECKSOFT-LABEL: insert_v8f16:
+; CHECKSOFT: @ %bb.0: @ %entry
+; CHECKSOFT-NEXT: vmov.f16 s0, r0
+; CHECKSOFT-NEXT: vmov r2, r3, d1
+; CHECKSOFT-NEXT: vmov r0, r1, d0
+; CHECKSOFT-NEXT: bx lr
+entry:
+ %res = insertelement <8 x half> undef, half %a, i32 0
+ ret <8 x half> %res
+}
+
define <4 x half> @test_vset_lane_f16(<4 x half> %a, float %fb) nounwind {
; CHECKHARD-LABEL: test_vset_lane_f16:
; CHECKHARD: @ %bb.0: @ %entry
Index: llvm/lib/Target/ARM/ARMInstrNEON.td
===================================================================
--- llvm/lib/Target/ARM/ARMInstrNEON.td
+++ llvm/lib/Target/ARM/ARMInstrNEON.td
@@ -6494,6 +6494,11 @@
def : Pat<(v4f32 (scalar_to_vector SPR:$src)),
(INSERT_SUBREG (v4f32 (IMPLICIT_DEF)), SPR:$src, ssub_0)>;
+def : Pat<(v4f16 (scalar_to_vector (f16 HPR:$src))),
+ (INSERT_SUBREG (v4f16 (IMPLICIT_DEF)), HPR:$src, ssub_0)>;
+def : Pat<(v8f16 (scalar_to_vector (f16 HPR:$src))),
+ (INSERT_SUBREG (v8f16 (IMPLICIT_DEF)), HPR:$src, ssub_0)>;
+
def : Pat<(v8i8 (scalar_to_vector GPR:$src)),
(VSETLNi8 (v8i8 (IMPLICIT_DEF)), GPR:$src, (i32 0))>;
def : Pat<(v4i16 (scalar_to_vector GPR:$src)),
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