[PATCH] D95375: [MC] Adding MCContext parameter to MCAsmBackend::relaxInstruction

David Ferenc Szabo via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 25 09:37:23 PST 2021


DavidFerencSzabo created this revision.
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The motivation is to be able to relax out of range conditional branches when the input is assembly. The existing pass not works at this level. To achieve this the conditional branch  must be relaxed into an instructions pair, which then put into a BUNDLE. The change allows targets to create MCInst objects using MCContext object inside the relaxation function.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D95375

Files:
  llvm/include/llvm/MC/MCAsmBackend.h
  llvm/include/llvm/MCA/CodeEmitter.h
  llvm/lib/MC/MCAssembler.cpp
  llvm/lib/MC/MCObjectStreamer.cpp
  llvm/lib/MCA/CodeEmitter.cpp
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
  llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
  llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
  llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
  llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
  llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
  llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
  llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
  llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
  llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
  llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
  llvm/tools/llvm-mca/llvm-mca.cpp

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