[PATCH] D95322: [RISCV] Custom type legalize i8/i16 UDIV/UREM/SDIV on RV64 so we can use divuw/remuw/divw.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:2180
+    // We only care about the lower 32 bits.
+    Known = KnownBits::urem(Known.trunc(32), Known2.trunc(32));
+    // Restore the original width by sign extending.
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jrtc27 wrote:
> Do these do the right thing for 0 (which RISC-V defines as saturating)? Or do we not care because it's UB in the IR?
I think they do the right thing, but I've added a note that the behavior is undefined so we don't have to worry about someone changing the KnownBits implementation in the future. If we find a use case for making them not undefined, we can revisit.


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  https://reviews.llvm.org/D95322/new/

https://reviews.llvm.org/D95322