[PATCH] D94615: [RISCV] Add RVV insertelt/extractelt scalable-vector patterns
Fraser Cormack via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 25 04:54:20 PST 2021
frasercrmck updated this revision to Diff 318967.
frasercrmck marked 3 inline comments as done.
frasercrmck added a comment.
- rebase on main
- use custom-lowering and fewer patterns
- move FromFPR32 helper to anticipate incoming changes
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D94615/new/
https://reviews.llvm.org/D94615
Files:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.h
llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv32.ll
llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv64.ll
llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll
llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll
llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv32.ll
llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv64.ll
llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv32.ll
llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv64.ll
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