[PATCH] D95136: [X86] Fix tile config register spill issue.

[Xiang Zhang via Phabricator via llvm-commits]

xiangzhangllvm added inline comments.


================
Comment at: llvm/lib/Target/X86/X86PreTileConfig.cpp:260
+  };
+
+  ReloadTileConfig(MachineInstr *MI, int FI, const TargetInstrInfo *TII,
----------------
We just need to collect insert point after call which appended by AMX instruction, 
I suggest a clear O(N) logic in 1 DFS:


```
ReloadTileConfig (MBB ) {  // stark from tilecfg MBB
     For each MI in MBB {
        CallNum = 0;
        if MI is Call 
            push Call into CallStack
            ++CallNum;
        if MI is AMX
            Mark the Call in Top of CallStack is NeedInsert;
      }
      For MBBS in MBB->Succs
          ReloadTileConfig (MBB )
      While CallNum--
          if CallStack .top is marked NeedInsert
             Save CallStack .top into NeedInsertPosSet //NeedInsertPosSet will collect all the insert points
          CallStack.pop 
}
```



Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D95136/new/

https://reviews.llvm.org/D95136