[PATCH] D94457: [AArch64] Add some missing fusion subtarget features
Sjoerd Meijer via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 25 01:12:08 PST 2021
This revision was automatically updated to reflect the committed changes.
Closed by commit rG815dd4b29208: [AArch64] Add Cortex CPU subtarget features for instruction fusion. (authored by SjoerdMeijer).
Changed prior to commit:
https://reviews.llvm.org/D94457?vs=315945&id=318918#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D94457/new/
https://reviews.llvm.org/D94457
Files:
llvm/lib/Target/AArch64/AArch64.td
llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
llvm/lib/Target/AArch64/AArch64Subtarget.h
llvm/test/CodeGen/AArch64/misched-fusion-addr.ll
llvm/test/CodeGen/AArch64/misched-fusion-aes.ll
llvm/test/CodeGen/AArch64/misched-fusion-lit.ll
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