[PATCH] D95136: [X86] Fix tile config register spill issue.

[LuoYuanke via Phabricator via llvm-commits]

LuoYuanke added inline comments.


================
Comment at: llvm/lib/Target/X86/X86PreTileConfig.cpp:264
+    findInsertPoints(MI->getParent(), MI);
+    updateBBStatus(&MF->back());
+
----------------
I'm not sure there is only one exit.


================
Comment at: llvm/lib/Target/X86/X86PreTileConfig.cpp:338
+        findInsertPoints(*I);
+      if (Call && BBStatus[*I] == HasAMXBeforeCall)
+        CfgNeedInsert.insert(Call);
----------------
Not sure about this condition. If there is no call in its direct successor, but there is amx before call in its successor's successor.

                          call
                        /      \
                    BB1      BB2
                      |
                     amx
                     call


================
Comment at: llvm/lib/Target/X86/X86PreTileConfig.cpp:345
+  // update them after all BBs have been visited.
+  void updateBBStatus(MachineBasicBlock *MBB) {
+    std::queue<MachineBasicBlock *> WorkList;
----------------
I didn't figure out this function yet. @xiangzhangllvm, would you help to review this function?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D95136/new/

https://reviews.llvm.org/D95136