[PATCH] D95322: [RISCV] Custom type legalize i8/i16 UDIV/UREM/SDIV on RV64 so we can use divuw/remuw/divw.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
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This makes our i8/i16 codegen more similar to the i32 codegen.

I've also added computeKnownBits support for DIVUW/REMUW so
that we can remove zero extending ANDs from the output. Without
this we end up turning DIVUW/REMUW back into DIVU/REMU via some
isel patterns.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D95322

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rv64m-exhaustive-w-insts.ll

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