[PATCH] D95136: [X86] Fix tile config register spill issue.
LuoYuanke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Jan 23 20:55:46 PST 2021
LuoYuanke added inline comments.
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Comment at: llvm/lib/Target/X86/X86PreTileConfig.cpp:255
+ for (auto *I : LastAMXSet)
+ BuildMI(*I->getParent(), ++I->getIterator(), DebugLoc(),
+ TII->get(X86::TILERELEASE));
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May add more test case for tilerelease. We may insert multi tilerelease in different block, better to have test case to cover that.
================
Comment at: llvm/lib/Target/X86/X86PreTileConfig.cpp:281
+ // 0. No AMX instructions in the BB and its successors (or not sure).
+ // 1. No AMX instructions in the BB but there're in its successors.
+ // 2. There're AMX instructions in the BB but after a call instruction.
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The 4 state may be a enum to be more readable.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D95136/new/
https://reviews.llvm.org/D95136
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