[llvm] 5c62d66 - [SimplifyCFG] Regenerate test checks (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Sat Jan 23 12:28:49 PST 2021
Author: Nikita Popov
Date: 2021-01-23T21:24:54+01:00
New Revision: 5c62d661312a8408af1d6acb4195240088323898
URL: https://github.com/llvm/llvm-project/commit/5c62d661312a8408af1d6acb4195240088323898
DIFF: https://github.com/llvm/llvm-project/commit/5c62d661312a8408af1d6acb4195240088323898.diff
LOG: [SimplifyCFG] Regenerate test checks (NFC)
Added:
Modified:
llvm/test/Transforms/SimplifyCFG/DeadSetCC.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/SimplifyCFG/DeadSetCC.ll b/llvm/test/Transforms/SimplifyCFG/DeadSetCC.ll
index 8bfb0a007cc8..62dee74b248f 100644
--- a/llvm/test/Transforms/SimplifyCFG/DeadSetCC.ll
+++ b/llvm/test/Transforms/SimplifyCFG/DeadSetCC.ll
@@ -1,5 +1,5 @@
-; RUN: opt < %s -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | \
-; RUN: not grep "icmp eq"
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
; Check that simplifycfg deletes a dead 'seteq' instruction when it
; folds a conditional branch into a switch instruction.
@@ -9,20 +9,31 @@ declare void @foo()
declare void @bar()
define void @testcfg(i32 %V) {
- %C = icmp eq i32 %V, 18 ; <i1> [#uses=1]
- %D = icmp eq i32 %V, 180 ; <i1> [#uses=1]
- %E = or i1 %C, %D ; <i1> [#uses=1]
- br i1 %E, label %L1, label %Sw
+; CHECK-LABEL: @testcfg(
+; CHECK-NEXT: [[V_OFF:%.*]] = add i32 [[V:%.*]], -15
+; CHECK-NEXT: [[SWITCH:%.*]] = icmp ult i32 [[V_OFF]], 2
+; CHECK-NEXT: br i1 [[SWITCH]], label [[L2:%.*]], label [[L1:%.*]]
+; CHECK: L1:
+; CHECK-NEXT: call void @foo()
+; CHECK-NEXT: ret void
+; CHECK: L2:
+; CHECK-NEXT: call void @bar()
+; CHECK-NEXT: ret void
+;
+ %C = icmp eq i32 %V, 18
+ %D = icmp eq i32 %V, 180
+ %E = or i1 %C, %D
+ br i1 %E, label %L1, label %Sw
Sw: ; preds = %0
- switch i32 %V, label %L1 [
- i32 15, label %L2
- i32 16, label %L2
- ]
+ switch i32 %V, label %L1 [
+ i32 15, label %L2
+ i32 16, label %L2
+ ]
L1: ; preds = %Sw, %0
- call void @foo( )
- ret void
+ call void @foo( )
+ ret void
L2: ; preds = %Sw, %Sw
- call void @bar( )
- ret void
+ call void @bar( )
+ ret void
}
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