[PATCH] D95290: [RISCV] Add isel patterns to optimize slli.uw patterns without Zba extension.
Jessica Clarke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Jan 23 10:38:16 PST 2021
jrtc27 added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoB.td:50
// Convert rotl immediate to a rotr immediate for XLen instructions.
-def ImmROTL2R : SDNodeXForm<imm, [{
+def ImmSubFromXLen : SDNodeXForm<imm, [{
uint64_t XLen = Subtarget->getXLen();
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Probably worth just moving this now; no doubt something will come along later that needs it.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D95290/new/
https://reviews.llvm.org/D95290
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