[PATCH] D94940: [RISCV] Implement vsoxseg/vsuxseg intrinsics.
Hsiangkai Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 22 16:56:09 PST 2021
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG66a49aef690c: [RISCV] Implement vsoxseg/vsuxseg intrinsics. (authored by HsiangKai).
Changed prior to commit:
https://reviews.llvm.org/D94940?vs=318392&id=318691#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D94940/new/
https://reviews.llvm.org/D94940
Files:
llvm/include/llvm/IR/IntrinsicsRISCV.td
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
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