[PATCH] D95267: Add the use of register r for outlined function when register r is live in and defined later.

Jin Lin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 22 14:57:52 PST 2021


jinlin created this revision.
jinlin added a reviewer: paquette.
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The compiler needs to mark register $x0 as live in for the following case.

  $x1 = ADDXri $sp, 16, 0
  BL @spam, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit killed $x1, implicit-def $sp, implicit-def dead $x0


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D95267

Files:
  llvm/lib/CodeGen/MachineOutliner.cpp
  llvm/test/CodeGen/AArch64/machine-outliner-side-effect-2.mir


Index: llvm/test/CodeGen/AArch64/machine-outliner-side-effect-2.mir
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/AArch64/machine-outliner-side-effect-2.mir
@@ -0,0 +1,51 @@
+# RUN: llc -mtriple=aarch64 -run-pass=machine-outliner -verify-machineinstrs %s -o - | FileCheck %s
+
+# The test checks whether the compiler updates the side effect of function @OUTLINED_FUNCTION_0 by adding the use of register x0.
+
+--- |
+  declare void @spam() local_unnamed_addr
+  define void @bax() optsize minsize noredzone { ret void }
+  define void @bay() optsize minsize noredzone { ret void }
+  define void @baz() optsize minsize noredzone { ret void }
+...
+---
+name:            bax
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $x0, $lr
+
+    $x1 = ADDXri $sp, 16, 0
+    BL @spam, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit killed $x1, implicit-def $sp, implicit-def dead $x0
+
+    RET_ReallyLR
+
+...
+---
+name:            bay
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $x0, $lr
+
+    $x1 = ADDXri $sp, 16, 0
+    BL @spam, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit killed $x1, implicit-def $sp, implicit-def dead $x0
+
+    RET_ReallyLR
+
+...
+---
+name:            baz
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $x0, $lr
+
+    $x1 = ADDXri $sp, 16, 0
+    BL @spam, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit killed $x1, implicit-def $sp, implicit-def dead $x0
+
+    RET_ReallyLR
+
+...
+
+# CHECK: BL @OUTLINED_FUNCTION_0, {{.*}}, implicit $x0
Index: llvm/lib/CodeGen/MachineOutliner.cpp
===================================================================
--- llvm/lib/CodeGen/MachineOutliner.cpp
+++ llvm/lib/CodeGen/MachineOutliner.cpp
@@ -807,7 +807,7 @@
             if (MOP.isDef()) {
               // Introduce DefRegs set to skip the redundant register.
               DefRegs.insert(MOP.getReg());
-              if (UseRegs.count(MOP.getReg()))
+              if (!MOP.isDead() && UseRegs.count(MOP.getReg()))
                 // Since the regiester is modeled as defined,
                 // it is not necessary to be put in use register set.
                 UseRegs.erase(MOP.getReg());


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