[PATCH] D94582: [RISCV] Rename mnemonics slliu.w->slli.uw and addu.w->add.uw to match 0.93 bitmanip spec.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 22 12:51:05 PST 2021


This revision was automatically updated to reflect the committed changes.
Closed by commit rGb825278364d9: [RISCV] Rename mnemonics slliu.w->slli.uw and addu.w->add.uw to match 0.93… (authored by craig.topper).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94582/new/

https://reviews.llvm.org/D94582

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoB.td
  llvm/test/CodeGen/RISCV/rv64Zbb.ll
  llvm/test/MC/RISCV/rv64zbb-invalid.s
  llvm/test/MC/RISCV/rv64zbb-valid.s

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