[PATCH] D95250: [NewPM][AMDGPU] Skip adding CGSCCOptimizerLate callbacks at O0
Arthur Eubanks via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 22 12:34:06 PST 2021
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG42d682a217b6: [NewPM][AMDGPU] Skip adding CGSCCOptimizerLate callbacks at O0 (authored by aeubanks).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D95250/new/
https://reviews.llvm.org/D95250
Files:
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
Index: llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -579,24 +579,27 @@
PB.registerCGSCCOptimizerLateEPCallback(
[this, DebugPassManager](CGSCCPassManager &PM,
PassBuilder::OptimizationLevel Level) {
- FunctionPassManager FPM(DebugPassManager);
+ if (Level == PassBuilder::OptimizationLevel::O0)
+ return;
- // Add infer address spaces pass to the opt pipeline after inlining
- // but before SROA to increase SROA opportunities.
- FPM.addPass(InferAddressSpacesPass());
+ FunctionPassManager FPM(DebugPassManager);
- // This should run after inlining to have any chance of doing
- // anything, and before other cleanup optimizations.
- FPM.addPass(AMDGPULowerKernelAttributesPass());
+ // Add infer address spaces pass to the opt pipeline after inlining
+ // but before SROA to increase SROA opportunities.
+ FPM.addPass(InferAddressSpacesPass());
- if (Level != PassBuilder::OptimizationLevel::O0) {
- // Promote alloca to vector before SROA and loop unroll. If we
- // manage to eliminate allocas before unroll we may choose to unroll
- // less.
- FPM.addPass(AMDGPUPromoteAllocaToVectorPass(*this));
- }
+ // This should run after inlining to have any chance of doing
+ // anything, and before other cleanup optimizations.
+ FPM.addPass(AMDGPULowerKernelAttributesPass());
+
+ if (Level != PassBuilder::OptimizationLevel::O0) {
+ // Promote alloca to vector before SROA and loop unroll. If we
+ // manage to eliminate allocas before unroll we may choose to unroll
+ // less.
+ FPM.addPass(AMDGPUPromoteAllocaToVectorPass(*this));
+ }
- PM.addPass(createCGSCCToFunctionPassAdaptor(std::move(FPM)));
+ PM.addPass(createCGSCCToFunctionPassAdaptor(std::move(FPM)));
});
}
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