[PATCH] D95196: [RISCV] Add test cases for vsuxseg (RV32).

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 22 10:19:21 PST 2021

Previous message: [PATCH] D95196: [RISCV] Add test cases for vsuxseg (RV32).
Next message: [PATCH] D95196: [RISCV] Add test cases for vsuxseg (RV32).
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.

LGTM


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D95196/new/

https://reviews.llvm.org/D95196

Previous message: [PATCH] D95196: [RISCV] Add test cases for vsuxseg (RV32).
Next message: [PATCH] D95196: [RISCV] Add test cases for vsuxseg (RV32).
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list