[PATCH] D94736: [RISCV] Change zext.w to be an alias of add.uw rd, rs1, x0 instead of pack.

[Alex Bradbury via Phabricator via llvm-commits]

asb accepted this revision.
asb added a comment.

LGTM, added two minor notes.



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Comment at: llvm/lib/Target/RISCV/RISCV.td:73
                              "'Zbb' (Base 'B' Instructions)">;
+def NotHasStdExtZbb : Predicate<"!Subtarget->hasStdExtZbb()">;
 
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I think this is unused?


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoB.td:509
 
+let Predicates = [HasStdExtZba, IsRV64] in {
+def : InstAlias<"zext.w $rd, $rs", (ADDUW GPR:$rd, GPR:$rs, X0)>;
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Per Fraser's comment about noting these deviations, it might be worth adding a code comment here to note the deviation from the 0.93 spec.


Repository:
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https://reviews.llvm.org/D94736