[PATCH] D95241: AMDGPU: Fix redundant FP spilling/assert in some functions

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 22 08:21:38 PST 2021


arsenm created this revision.
arsenm added reviewers: scott.linder, RamNalamothu, kerbowa, rampitec.
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If a function has stack objects, and a call, we require an FP. If we
did not initially have any stack objects, and only introduced them
during PrologEpilogInserter for CSR VGPR spills, SILowerSGPRSpills
would end up spilling the FP register as if it were a normal
register. This would result in an assert in a debug build, or
redundant handling of the FP register in a release build.

      

Try to predict that we will have an FP later, although this is ugly.


https://reviews.llvm.org/D95241

Files:
  llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
  llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
  llvm/test/CodeGen/AMDGPU/need-fp-from-csr-vgpr-spill.ll

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