[PATCH] D95207: [RISCV] Fix RVV intrinsic CodeGen tests for vrgather

[ShihPo Hung via Phabricator via llvm-commits]

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1. Op2 type should be XLEN instead of SEW
2. Add double type in vrgather-rv32 cases.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D95207

Files:
  llvm/test/CodeGen/RISCV/rvv/vrgather-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vrgather-rv64.ll

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