[PATCH] D95136: [X86] Fix tile config register spill issue.

Xiang Zhang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 21 23:08:23 PST 2021


xiangzhangllvm added inline comments.


================
Comment at: llvm/lib/Target/X86/X86PreTileConfig.cpp:284
+    CPP.second++;
+    if (findAllSuccSlot(CPP, WorkList, LastAMXSet) && Call != MI)
+      CfgNeedInsert.insert(Call);
----------------
xiangzhangllvm wrote:
> The Algorithm complexity is O(N*N)
> 
> The Algorithm complexity is O(N*N)
> 




================
Comment at: llvm/lib/Target/X86/X86PreTileConfig.cpp:284
+    CPP.second++;
+    if (findAllSuccSlot(CPP, WorkList, LastAMXSet) && Call != MI)
+      CfgNeedInsert.insert(Call);
----------------
xiangzhangllvm wrote:
> xiangzhangllvm wrote:
> > The Algorithm complexity is O(N*N)
> > 
> > The Algorithm complexity is O(N*N)
> > 
> 
> 
> The Algorithm complexity is O(N*N)
I think we can do this in 1 DFS.




Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D95136/new/

https://reviews.llvm.org/D95136



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