[PATCH] D94903: [RISCV] Implement vloxseg/vluxseg intrinsics.
Hsiangkai Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 21 18:42:41 PST 2021
HsiangKai updated this revision to Diff 318385.
HsiangKai retitled this revision from "[RISCV] Implement vlxseg intrinsics." to "[RISCV] Implement vloxseg/vluxseg intrinsics.".
HsiangKai edited the summary of this revision.
HsiangKai added a comment.
- Address @craig.topper's comments.
- Update to v1.0
- Put test cases into D95193 <https://reviews.llvm.org/D95193>, D95192 <https://reviews.llvm.org/D95192>, D95191 <https://reviews.llvm.org/D95191>, D95190 <https://reviews.llvm.org/D95190>
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D94903/new/
https://reviews.llvm.org/D94903
Files:
llvm/include/llvm/IR/IntrinsicsRISCV.td
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
llvm/lib/Target/RISCV/RISCVISelLowering.h
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
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