[PATCH] D94645: [AMDGPU] Fix llvm.amdgcn.init.exec and frame materialization
Ruiling, Song via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 21 18:25:05 PST 2021
ruiling added a comment.
Thanks for the patch. Basically LGTM with some minor comments.
> Fix this by moving lowering of llvm.amdgcn.init.exec post-RA.
The commit message need slightly updated as this is not post-RA anymore.
================
Comment at: llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp:746
+ LIS->removeInterval(InputReg);
+ LIS->createAndComputeVirtRegInterval(InputReg);
+ LIS->createAndComputeVirtRegInterval(CountReg);
----------------
I am not sure whether you like to put this under an `if (InputReg.isVirtual())` condition. I guess we may only meet issue when moving this piece of code or the pass around.
================
Comment at: llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.ll:171-172
+endif:
+ %array0 = alloca [1024 x i32], align 16, addrspace(5)
+ %array1 = alloca [20 x i32], align 16, addrspace(5)
+
----------------
There are some testing failure for Windows, seems dynamic `alloca` not correctly handled for GlobalISel path under Windows. I think we can simply move these two `alloca`s to entry block. The case will be used to only check `llvm.amdgcn.init.exec.from.input` works correctly when placing in non-entry block. Do you have any other idea?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D94645/new/
https://reviews.llvm.org/D94645
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