[PATCH] D88389: [M68k] (Patch 3/8) Basic infrastructures and target description files

[Min-Yih Hsu via Phabricator via llvm-commits]

myhsu marked 2 inline comments as done.
myhsu added inline comments.


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Comment at: llvm/lib/Target/M68k/M68kCallingConv.td:87
+
+def CC_M68k_C : CallingConv<[
+  /// Promote i1/i8/i16 arguments to i32.
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jrtc27 wrote:
> How do you handle the `sret` argument? That needs to go in %a0, and also be implicitly returned in %a0.
good catch. I will put it to the backlog and add TODO comments here


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Comment at: llvm/lib/Target/M68k/M68kInstrFormats.td:179
+///
+/// If the EA is a direct register use the 3 bit is known to distinguish
+/// between Data and Address register types and bits 5 and 4 are 0. This allows
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craig.topper wrote:
> "use the 3 bit is known" doesn't make sense to me. I'm not sure what's it supposed to say. "the 3 bits are known"? Or something else?
according to M68k's ISA reference, I think it was going to say: if EA is in direct register mode, bit 4 and 5 will be 0, and the register number will be encoded in bits 0 ~ 3.


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  https://reviews.llvm.org/D88389/new/

https://reviews.llvm.org/D88389