[PATCH] D95115: [PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests

[Amy Kwan via Phabricator via llvm-commits]

amyk created this revision.
amyk added reviewers: power-llvm-team, PowerPC, nemanjai.
amyk added a project: PowerPC.
Herald added subscribers: shchenz, hiraditya, qcolombet.
amyk requested review of this revision.
Herald added a project: LLVM.

This patch includes the following updates to the load/store refactoring effort introduced in D93370 <https://reviews.llvm.org/D93370>:

- Update various VSX patterns that use to "force" an XForm, to instead just XForm.  This allows the ability for the patterns to compute the most optimal addressing mode (and to produce a DForm instruction when possible)
- Check the alignment of Frame Index
- Update pattern and test case for the `LXVD2X`/`STXVD2X` intrinsics
- Update LIT test cases that use to use the XForm instruction to use the DForm instruction

Depends on D93370 <https://reviews.llvm.org/D93370>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D95115

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCInstrVSX.td
  llvm/test/CodeGen/PowerPC/PR33671.ll
  llvm/test/CodeGen/PowerPC/VSX-XForm-Scalars.ll
  llvm/test/CodeGen/PowerPC/build-vector-tests.ll
  llvm/test/CodeGen/PowerPC/builtins-ppc-p9-f128.ll
  llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
  llvm/test/CodeGen/PowerPC/constant-pool.ll
  llvm/test/CodeGen/PowerPC/ctrloop-constrained-fp.ll
  llvm/test/CodeGen/PowerPC/extract-and-store.ll
  llvm/test/CodeGen/PowerPC/f128-aggregates.ll
  llvm/test/CodeGen/PowerPC/f128-arith.ll
  llvm/test/CodeGen/PowerPC/f128-compare.ll
  llvm/test/CodeGen/PowerPC/f128-conv.ll
  llvm/test/CodeGen/PowerPC/f128-passByValue.ll
  llvm/test/CodeGen/PowerPC/f128-truncateNconv.ll
  llvm/test/CodeGen/PowerPC/fast-isel-load-store-vsx.ll
  llvm/test/CodeGen/PowerPC/float-load-store-pair.ll
  llvm/test/CodeGen/PowerPC/fma-combine.ll
  llvm/test/CodeGen/PowerPC/fmf-propagation.ll
  llvm/test/CodeGen/PowerPC/fp-strict-conv-f128.ll
  llvm/test/CodeGen/PowerPC/fp128-bitcast-after-operation.ll
  llvm/test/CodeGen/PowerPC/instr-properties.ll
  llvm/test/CodeGen/PowerPC/load-shuffle-and-shuffle-store.ll
  llvm/test/CodeGen/PowerPC/lxv-aligned-stack-slots.ll
  llvm/test/CodeGen/PowerPC/mcm-4.ll
  llvm/test/CodeGen/PowerPC/mma-acc-spill.ll
  llvm/test/CodeGen/PowerPC/mma-outer-product.ll
  llvm/test/CodeGen/PowerPC/mul-const-vector.ll
  llvm/test/CodeGen/PowerPC/non-debug-mi-search-frspxsrsp.ll
  llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll
  llvm/test/CodeGen/PowerPC/p10-vector-rotate.ll
  llvm/test/CodeGen/PowerPC/p9-vinsert-vextract.ll
  llvm/test/CodeGen/PowerPC/pcrel-linkeropt.ll
  llvm/test/CodeGen/PowerPC/ppc64-align-long-double.ll
  llvm/test/CodeGen/PowerPC/ppc64-i128-abi.ll
  llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
  llvm/test/CodeGen/PowerPC/pr30715.ll
  llvm/test/CodeGen/PowerPC/pr36292.ll
  llvm/test/CodeGen/PowerPC/pr38087.ll
  llvm/test/CodeGen/PowerPC/pr43527.ll
  llvm/test/CodeGen/PowerPC/pr45628.ll
  llvm/test/CodeGen/PowerPC/pre-inc-disable.ll
  llvm/test/CodeGen/PowerPC/recipest.ll
  llvm/test/CodeGen/PowerPC/scalar_vector_test_1.ll
  llvm/test/CodeGen/PowerPC/scalar_vector_test_2.ll
  llvm/test/CodeGen/PowerPC/select_const.ll
  llvm/test/CodeGen/PowerPC/store_fptoi.ll
  llvm/test/CodeGen/PowerPC/swaps-le-6.ll
  llvm/test/CodeGen/PowerPC/tailcall-speculatable-callee.ll
  llvm/test/CodeGen/PowerPC/toc-float.ll
  llvm/test/CodeGen/PowerPC/unaligned-addressing-mode.ll
  llvm/test/CodeGen/PowerPC/unaligned.ll
  llvm/test/CodeGen/PowerPC/vavg.ll
  llvm/test/CodeGen/PowerPC/vec-itofp.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
  llvm/test/CodeGen/PowerPC/vec_int_ext.ll
  llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
  llvm/test/CodeGen/PowerPC/vector-extend-sign.ll
  llvm/test/CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll
  llvm/test/CodeGen/PowerPC/vsx-p9.ll
  llvm/test/CodeGen/PowerPC/vsx.ll
  llvm/test/CodeGen/PowerPC/vsx_builtins.ll
  llvm/test/CodeGen/PowerPC/vsx_scalar_ld_st.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D95115.318113.patch
Type: text/x-patch
Size: 284694 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210121/7dcdaec5/attachment-0001.bin>