[PATCH] D94688: [RISCV] Implement vsseg intrinsics.

Hsiangkai Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 20 19:53:38 PST 2021


This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG47228f785460: [RISCV] Implement vsseg intrinsics. (authored by HsiangKai).

Changed prior to commit:
  https://reviews.llvm.org/D94688?vs=317745&id=318094#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94688/new/

https://reviews.llvm.org/D94688

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/vsseg-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vsseg-rv64.ll

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