[PATCH] D94736: [RISCV] Change zext.w to be an alias of add.uw rd, rs1, x0 instead of pack.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 20 15:49:27 PST 2021
craig.topper updated this revision to Diff 318044.
craig.topper added a comment.
Rebase
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D94736/new/
https://reviews.llvm.org/D94736
Files:
llvm/lib/Target/RISCV/RISCV.td
llvm/lib/Target/RISCV/RISCVInstrInfo.td
llvm/lib/Target/RISCV/RISCVInstrInfoB.td
llvm/test/CodeGen/RISCV/rv64Zba.ll
llvm/test/CodeGen/RISCV/rv64Zbbp.ll
llvm/test/MC/RISCV/rv64b-aliases-valid.s
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