[PATCH] D94949: [AArch64][RegAllocFast] Add findSpillBefore to TargetRegisterInfo

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

AMDGPU has a similar problem/mechanism handled with TII::isBasicBlockPrologue. I'm not really satisfied with it, and this looks similarly ad-hoc. I'm not really sure what the right solution is, but I've been considering something looking like a new type of label pseudo



================
Comment at: llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp:820
+    default:
+      return 0;
+    }
----------------
Technically 0 is TargetOpcode::PHI


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D94949/new/

https://reviews.llvm.org/D94949