[PATCH] D94974: [SLP] Try doubled MaxElts for stores vectorization

[Anton Afanasyev via Phabricator via llvm-commits]

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Try to use `2 * MaxElts` size of vectors for stores vectorization. This commit
is motivated by effect of bugfixing at reviews.llvm.org/D93192 <https://reviews.llvm.org/D93192> and tries
to compensate it.
There could be the case, for instance, when cost of pair of `<4 x float>`
vectorization is zero, but vectorization of `<8 x float>` is beneficial however.
LLVM vector with `2 * MaxElts` cannot be lowered to one register, of course, it is splitted
to two registers.
We try to check `2 * MaxElts` after `MaxElts` not to interfere the ordinary vectorization
which could be accepted as beneficial itself.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D94974

Files:
  llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
  llvm/test/Transforms/SLPVectorizer/X86/arith-add-ssat.ll
  llvm/test/Transforms/SLPVectorizer/X86/arith-mul.ll
  llvm/test/Transforms/SLPVectorizer/X86/arith-sub-ssat.ll
  llvm/test/Transforms/SLPVectorizer/X86/pr47623.ll
  llvm/test/Transforms/SLPVectorizer/X86/shift-ashr.ll
  llvm/test/Transforms/SLPVectorizer/X86/sitofp.ll
  llvm/test/Transforms/SLPVectorizer/X86/uitofp.ll

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