[PATCH] D56387: [DAGCombiner] Enable SimplifyDemandedBits vector support for TRUNCATE
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 19 07:38:39 PST 2021
RKSimon added inline comments.
================
Comment at: llvm/test/CodeGen/X86/combine-sra.ll:248-250
+; AVX2-SLOW-NEXT: vpsrlq $32, %ymm0, %ymm0
+; AVX2-SLOW-NEXT: vextracti128 $1, %ymm0, %xmm1
+; AVX2-SLOW-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
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xbolva00 wrote:
> lebedev.ri wrote:
> > Appears to be a regression
> @RKSimon
Looking at this now - the set of combines that was necessary to get to the old codegen is pretty impressive.....
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rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D56387/new/
https://reviews.llvm.org/D56387
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