[PATCH] D94589: [RISCV] Add intrinsics for vector AMO instructions

[ShihPo Hung via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG9cf511aa08ae: [RISCV] Add intrinsics for vector AMO operations (authored by arcbbb).

Changed prior to commit:
  https://reviews.llvm.org/D94589?vs=317254&id=317466#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94589/new/

https://reviews.llvm.org/D94589

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/vamoadd-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vamoadd-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vamoand-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vamoand-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vamomax-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vamomax-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vamomaxu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vamomaxu-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vamomin-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vamomin-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vamominu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vamominu-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vamoor-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vamoor-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vamoswap-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vamoswap-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vamoxor-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vamoxor-rv64.ll