[PATCH] D94883: [CodeGen][SelectionDAG]Add new intrinsic experimental.vector.reverse

Caroline via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Jan 17 11:45:58 PST 2021


CarolineConcatto created this revision.
Herald added subscribers: ecnelises, jdoerfert, hiraditya.
CarolineConcatto requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

This patch adds experimental.vector.reduce that takes a single vector and
returns a vector of matching type but with the original lane
order reversed. For example:

vector.reverse(<A,B,C,D>) ==> <D,C,B,A>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D94883

Files:
  llvm/docs/LangRef.rst
  llvm/include/llvm/CodeGen/ISDOpcodes.h
  llvm/include/llvm/IR/Intrinsics.td
  llvm/lib/Analysis/InstructionSimplify.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
  llvm/lib/CodeGen/TargetLoweringBase.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/test/CodeGen/AArch64/named-vector-shuffles-neon.ll
  llvm/test/CodeGen/AArch64/named-vector-shuffles-sve.ll
  llvm/test/Transforms/InstSimplify/named-vector-shuffles.ll

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