[PATCH] D94778: [AArch64] Further restricts when a dup(*ext) can be rearranged

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:11851
       InsertVectorElt.getOpcode(), DL, PreExtendVT, DAG.getUNDEF(PreExtendVT),
       Extend.getOperand(0), DAG.getConstant(0, DL, MVT::i64));
 
----------------
Is it worth making sure Extend.getOperand(0) is the right size instead, with a DAG.getAnyExtOrTrunc?


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:11861
       DAG.getNode(IsSExt ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, DL, TargetType,
                   VectorShuffleNode, DAG.getValueType(TargetType));
 
----------------
This probably doesn't need a value type, unless it's an extend_inreg.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94778/new/

https://reviews.llvm.org/D94778