[PATCH] D94215: [PostRASched] Breaking More CriticalAntiDeps

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/test/CodeGen/X86/critical-anti-dep-breaker.ll:7
 ; There is an anti-dependency (WAR) hazard using RAX using default reg allocation and scheduling.
 ; The post-RA-scheduler and critical-anti-dependency breaker can eliminate that hazard using R10.
 ; That is the first free register that isn't used as a param in the call to "@Image".
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This comment still mentions R10, but the check line now uses RSI.

Probably best to regenerate the whole test with update_llc_test_checks.py and pre-commit it. Then rebase this patch to show how the whole function chagnes. Seeing only one instruction is hard to understand.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94215/new/

https://reviews.llvm.org/D94215