[PATCH] D94355: [SimplifyCFG] Add relative switch lookup tables

[Roland McGrath via Phabricator via llvm-commits]

mcgrathr added a comment.

Many backends generate PIC-friendly jump tables.  This is about generating IR initializers that translate to the same kind of backend assembly expressions as those backends use for their jump tables.

On all targets I'm aware of, the only kind of expression involving two symbols like this that can be expressed at all in assembly / relocations is a PC-relative case where one of the symbols is in the same section of the same TU as the data containing the reference (and is not dynamically interposable, i.e. has internal linkage or is dso_local).  I don't think mips or powerpc is at all unlike any other platform in this regard.  Indeed this applies to targets where the pointer size is not 64 bits, too.  But as far as I'm aware, in all cases there is a 32-bit signed offset option for PC-relative references and in many that's the only option.  So it probably is reasonable to hard-code the table entry offset size as 32 bits, though the pointer size obviously should be whatever is the size of pointers on the particular target.

It's possible the 32-bit offsets won't work when in medium or large code models on 64-bit machines.  On some machines that have code models where 32 bit offsets are not always sufficient, there are 64-bit PC-relative relocs you can use so the same method but using 64-bit table entries is feasible.  But I'm not sure that's the case of all 64-bit machines (it is true of aarch64 and x86-64 when using ELF, but I don't know others off hand).  So it might be necessary to parameterize either enabling the PIC-friendly flavor of the optimization, or the offset size to use in table entries, or both, based on the target and the code model setting as interpreted for each particular target.


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https://reviews.llvm.org/D94355